SL3516

Family ARM9TDMI

Architecture ARMv4T

Version ARM920T

Cache (I/D)/MMU 16 KB/16 KB, MMU

Typical MIPS @ MHz 200 MIPS @ 180 MHz

In application

Armadillo, GP32,GP2X (first core), Tapwave Zodiac (Motorola i. MX1), Hewlet Packard HP-49/50 Calculators, Sun SPOT, Samsung s3c2442 (HTC TyTN, FIC Neo1973[5])

SL3516

CPU0: D VIVT write-back cache

CPU0: I cache: 16384 bytes, associativity 2, 16 byte lines, 512 sets

CPU0: D cache: 8192 bytes, associativity 2, 16 byte lines, 256 sets